Effective-Address Profiles
EA is the base seven-bit compact effective-address profile selected by the consuming instruction's operand type. Extensions may define additional profiles that reuse the memory address calculation rules and EXT1/EXT2 descriptor grammar in this section while assigning profile-specific compact forms. An effective-address field is an operand descriptor with an instruction-defined role and interpretation width. A value role reads or writes the selected register, immediate, or memory value. An address role uses a register or immediate as an address value and uses a memory-form EA as the calculated address without an initial data read. A control-target role uses a register or immediate value directly and reads an interpretation-width target from a memory form. Memory forms continue into segment pre-translation and paging.
Each compact field is embedded in the instruction's opcode space, and all compact fields precede any appended effective-address payload bytes. Any displacement, absolute address, immediate, or extended descriptor bytes are appended as separate payloads. All extended descriptor bytes appear first, ordered according to the declared instruction operand order of the operands that select them. All remaining effective-address payloads follow, also in declared instruction operand order. For two payload-bearing operands, the encoded stream contains the opcode space for both operands, any extended descriptor for operand 0, any extended descriptor for operand 1, the remaining operand 0 payloads, the remaining operand 1 payloads, and any trailing padding, in that order.
Multi-byte payloads, such as displacements, absolute addresses, and immediates, are little-endian. Payload names ending in s are signed and are sign-extended before use; payload names without s are unsigned unless the consuming instruction explicitly says otherwise. Extended descriptor bytes appear in stream order, byte 0 first. Each descriptor byte is independently numbered from bit 7 through bit 0.
Indexed scale is the EA interpretation width declared by the consuming instruction encoding. B, W, L, and Q widths select scales 1, 2, 4, and 8. An encoding without a fixed width uses its selected instruction size. LEA and SEGLEA use their suffix; size-less instructions with address or control-target roles use Q.
For every compact or extended-descriptor PC-based EA, the PC term is the architectural PC naming byte 0 of the current instruction. The PC term remains that instruction-start value throughout operand evaluation.
Compact Profile Encodings
The scalar EA profile encodes common Rn/SP/PC memory operands, absolute memory operands, integer immediate operands, and the EXT1 and EXT2 escapes. An extension-defined profile consists only of the forms explicitly declared by that extension; an unassigned selector has no form in that profile.
Compact memory forms that do not name SP or PC use the operation default data segment. SP memory forms are fixed to SS, and PC memory forms are fixed to CS.
Compact Effective-Address Profile Encoding
| Encoding | EA form |
|---|---|
000rrrr (0x00``-``-``0x0F) |
[Rn(r)] |
001rrrr (0x10``-``-``0x1F) |
[Rn(r) + disp8s] |
010rrrr (0x20``-``-``0x2F) |
[Rn(r) + disp16s] |
011rrrr (0x30``-``-``0x3F) |
[Rn(r) + disp32s] |
100rrrr (0x40``-``-``0x4F) |
[Rn(r) + disp64] |
1010000 (0x50) |
[SP + disp8s] |
1010001 (0x51) |
[SP + disp16s] |
1010010 (0x52) |
[SP + disp32s] |
1010011 (0x53) |
[SP + disp64] |
1010100 (0x54) |
[PC + disp8s] |
1010101 (0x55) |
[PC + disp16s] |
1010110 (0x56) |
[PC + disp32s] |
1010111 (0x57) |
[PC + disp64] |
1011000 (0x58) |
[SP] |
1011001 (0x59) |
[abs32s] |
1011010 (0x5A) |
[abs64] |
1011011 (0x5B) |
imm8s |
1011100 (0x5C) |
imm16s |
1011101 (0x5D) |
imm32s |
1011110 (0x5E) |
imm64 |
1011111 (0x5F) |
EXT1/disp8s |
1100000 (0x60) |
EXT1/disp16s |
1100001 (0x61) |
EXT1/disp32s |
1100010 (0x62) |
EXT1/disp64 |
1100011 (0x63) |
EXT1 |
1100100 (0x64) |
EXT2/disp8s |
1100101 (0x65) |
EXT2/disp16s |
1100110 (0x66) |
EXT2/disp32s |
1100111 (0x67) |
EXT2/disp64 |
1101000 (0x68) |
EXT2 |
0x69``-``-``0x7F |
reserved |
Scalar compact mode details.
The following diagrams define the scalar compact forms selected by the preceding encoding table.
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Register Memory Encodings
(base.south) – (add.north); (disp.east) – (add.west); (add.south) – (ptr.north);
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Stack-Pointer Displaced Memory Encodings
(base.south) – (add.north); (disp.east) – (add.west); (add.south) – (ptr.north);
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Program-Counter Displaced Memory Encodings
(base.south) – (add.north); (disp.east) – (add.west); (add.south) – (ptr.north);
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Stack Pointer Indirect Encodings
(src.south) – (ptr.north);
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Absolute Memory Encodings
(src.south) – (ptr.north);
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Integer Immediate Encodings
(imm.south) – (operand.north);
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EXT1 Encodings
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EXT2 Encodings
Floating-Point FEA Immediate Forms
FEA directly declares the register, SP-displaced, PC-displaced, absolute, EXT1, and EXT2 selectors defined for this profile. Selectors 0x58, 0x5B, and 0x5C are reserved. Selectors 0x5D and 0x5E select immsf and immdf. The former appends four bytes and the latter eight bytes.
immsf carries the exact IEEE 754 binary32 interchange encoding and immdf carries the exact binary64 interchange encoding. Either source form is valid for either an S or D instruction. The payload format defines the source format and the instruction suffix defines the operation format. When they differ, operand evaluation converts the immediate to the operation format under the architectural IEEE 754 environment before the instruction operation. The conversion uses FSTATUS.RM; its floating-point exception causes are combined with the operation's causes and are tested and committed atomically under the ordinary precise floating-point fault rules. An FEA floating-point immediate is never a valid destination.
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Floating-Point Immediate Encodings
(imm.south) – (operand.north);
Vector VEA Lane Addressing
VEA directly declares the register, SP-displaced, PC-displaced, absolute, EXT1, and EXT2 selectors defined for this profile. Selectors 0x58 and 0x5B through 0x5E are reserved.
For an ordinary compact or EXT VEA memory form, address calculation first produces one scalar anchor using the shared base, scalar Rn index, scale, displacement, segment, and auto-update grammar. If \(E\) is the vector element size in bytes, lane \(n\) accesses \(\mathrm{anchor} + nE\). Separate vector instructions define scatter/gather addressing outside the VEA descriptor forms.
For a VEA auto-update form, a base-register update changes the base by \(\pm\mathrm{VLEN}/8\) bytes. A scalar Rn index update changes the index by \(\pm\)the instruction's number of elements before the element-size scale is applied. Predicate activity does not change either update quantity. Descriptor encodings and update ordering otherwise follow the base extended-EA rules.
VEA EXT1 Mode
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Default-Segment Base with Autoupdate / Postincrement Encodings
(update.east) – (updateop.west); (updateopfeedbackout) at (3.65,0.77); (updateopfeedbackin) at (3.79,0.77); (updateopin) at (3.65,0.295); (updateopout) at (3.79,0.295); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (base.south) – (add.north); (disp.east) – (add.west); (add.south) – (ptr.north);
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Default-Segment Base with Autoupdate / Predecrement Encodings
(update.east) – (updateop.west); (updateopfeedbackout) at (4.55,0.77); (updateopfeedbackin) at (4.69,0.77); (updateopin) at (4.55,0.295); (updateopout) at (4.69,0.295); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (updateop.south) – (add.north); (disp.east) – (add.west); (add.south) – (ptr.north);
VEA EXT2 Modes
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Explicit-Segment Indexed / Postincrement Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (update.east) – (updateop.west); (updateopfeedbackout) at (3.176,-0.67); (updateopfeedbackin) at (3.316,-0.67); (updateopin) at (3.176,-1.145); (updateopout) at (3.316,-1.145); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (idxtomul) at (3.933,-0.67); (idxtomul) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
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Explicit-Segment Indexed / Predecrement Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (update.east) – (updateop.west); (updateopfeedbackout) at (3.176,-0.67); (updateopfeedbackin) at (3.316,-0.67); (updateopin) at (3.176,-1.145); (updateopout) at (3.316,-1.145); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (updateop.south) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
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Explicit-Segment Indexed / Plain Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (idx.south) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
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Explicit-Segment Base with Autoupdate / Postincrement Encodings
(update.east) – (updateop.west); (updateopfeedbackout) at (3.65,0.77); (updateopfeedbackin) at (3.79,0.77); (updateopin) at (3.65,0.295); (updateopout) at (3.79,0.295); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (base.south) – (add.north); (disp.east) – (add.west); (add.south) – (ptr.north);
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Explicit-Segment Base with Autoupdate / Predecrement Encodings
(update.east) – (updateop.west); (updateopfeedbackout) at (4.55,0.77); (updateopfeedbackin) at (4.69,0.77); (updateopin) at (4.55,0.295); (updateopout) at (4.69,0.295); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (updateop.south) – (add.north); (disp.east) – (add.west); (add.south) – (ptr.north);
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Explicit-Segment Zero-Base Indexed / Postincrement Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (update.east) – (updateop.west); (updateopfeedbackout) at (3.176,-0.67); (updateopfeedbackin) at (3.316,-0.67); (updateopin) at (3.176,-1.145); (updateopout) at (3.316,-1.145); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (idxtomul) at (3.933,-0.67); (idxtomul) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
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Explicit-Segment Zero-Base Indexed / Predecrement Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (update.east) – (updateop.west); (updateopfeedbackout) at (3.176,-0.67); (updateopfeedbackin) at (3.316,-0.67); (updateopin) at (3.176,-1.145); (updateopout) at (3.316,-1.145); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (updateop.south) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
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Explicit-Segment Zero-Base Indexed / Plain Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (idx.south) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
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Stack-Pointer Indexed / Postincrement Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (update.east) – (updateop.west); (updateopfeedbackout) at (3.176,-0.67); (updateopfeedbackin) at (3.316,-0.67); (updateopin) at (3.176,-1.145); (updateopout) at (3.316,-1.145); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (idxtomul) at (3.933,-0.67); (idxtomul) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
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Stack-Pointer Indexed / Predecrement Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (update.east) – (updateop.west); (updateopfeedbackout) at (3.176,-0.67); (updateopfeedbackin) at (3.316,-0.67); (updateopin) at (3.176,-1.145); (updateopout) at (3.316,-1.145); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (updateop.south) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
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Stack-Pointer Indexed / Plain Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (idx.south) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
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Program-Counter Indexed / Postincrement Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (update.east) – (updateop.west); (updateopfeedbackout) at (3.176,-0.67); (updateopfeedbackin) at (3.316,-0.67); (updateopin) at (3.176,-1.145); (updateopout) at (3.316,-1.145); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (idxtomul) at (3.933,-0.67); (idxtomul) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
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Program-Counter Indexed / Predecrement Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (update.east) – (updateop.west); (updateopfeedbackout) at (3.176,-0.67); (updateopfeedbackin) at (3.316,-0.67); (updateopin) at (3.176,-1.145); (updateopout) at (3.316,-1.145); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (updateop.south) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
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Program-Counter Indexed / Plain Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (idx.south) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
Shared Extended Descriptor
A compact EXT1 or EXT2 value in any profile selects both an exact descriptor length and the displacement width. The descriptor bytes then select segment, base, index, zero-base, SP/PC indexed, and auto-update behavior within that family.
Each extended descriptor selects its segment from the encoded SREG field SEG(s), the fixed SS segment for SP, the fixed CS segment for PC, or the operation's default data segment.
For a compact displacement, absolute address, or immediate, the selected payload follows the compact field at that operand's payload position. Extended-descriptor construction begins with the compact escape value in the opcode space and exactly one EXT1 or two EXT2 descriptor bytes; a displaced form places its selected displacement after all extended descriptor bytes in the instruction. When an instruction has more than one extended EA operand, the decoder consumes their complete descriptors in declared instruction operand order. It then consumes every remaining appended EA payload, including any selected displacement, in declared instruction operand order.
Extended EA Addressing Modes
EXT1 and EXT2 extend EA when a compact form cannot express the operand: explicit segment selection, indexed addressing, zero-base addressing, SP/PC indexed addressing, or auto-update addressing. EXT1 selects exactly one descriptor byte; EXT2 selects exactly two descriptor bytes.
Each extended-descriptor form selects its segment from the encoded SREG field SEG(s), the fixed SS segment for SP, the fixed CS segment for PC, or the operation's default data segment.
EA evaluation begins by copying the architectural registers into temporary operand-evaluation state. Operands are then processed in instruction order. Within one EA, the base term is evaluated before the index term and then the displacement. Auto-update changes only the temporary operand-evaluation state while operands are being evaluated. Memory reads and writes are collected as instruction side effects, and neither those effects nor the register updates become architecturally visible until the instruction commits. A fault before commit therefore leaves both register and memory state unchanged apart from the exception-entry transition.
Postincrement forms use the current temporary value and update it afterward. Predecrement forms update the temporary value first and then use the result. A base register changes by the EA interpretation width in bytes; an index register changes by one element before scaling. Each REP iteration applies and commits these rules independently.
Size-less address-role instructions INVPAGE, FLSHDCACHE, INVDCACHE, INVICACHE, WRBKDCACHE, SYNCCACHE, PREFETCH, PREFETCHNT, and PTQUERY have Q interpretation width. Size-less control-target instructions DJcc, IJcc, LCALL, and LJMP also have Q interpretation width. Their extended-descriptor index scale is eight and their base predecrement or postincrement amount is eight. Cache range loops advance their explicit address by the CPUID maintenance granule, independently of this per-EA update amount.
When one register supplies both terms in [R1 + R1++ * scale], the base and index terms use the same current temporary R1 before the index update. In [R1 + ``-``-``R1 * scale], the base uses the current value; the index term then decrements temporary R1 and uses the updated value.
Scalar EXT1 Modes
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Explicit Segment with Base Encodings
(base.south) – (add.north); (disp.east) – (add.west); (add.south) – (ptr.north);
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Explicit Segment with Zero Base Encodings
(base.south) – (add.north); (disp.east) – (add.west); (add.south) – (ptr.north);
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Default-Segment Base with Autoupdate / Postincrement Encodings
(update.east) – (updateop.west); (updateopfeedbackout) at (3.65,0.77); (updateopfeedbackin) at (3.79,0.77); (updateopin) at (3.65,0.295); (updateopout) at (3.79,0.295); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (base.south) – (add.north); (disp.east) – (add.west); (add.south) – (ptr.north);
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Default-Segment Base with Autoupdate / Predecrement Encodings
(update.east) – (updateop.west); (updateopfeedbackout) at (4.55,0.77); (updateopfeedbackin) at (4.69,0.77); (updateopin) at (4.55,0.295); (updateopout) at (4.69,0.295); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (updateop.south) – (add.north); (disp.east) – (add.west); (add.south) – (ptr.north);
Scalar EXT2 Modes
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Explicit-Segment Indexed / Postincrement Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (update.east) – (updateop.west); (updateopfeedbackout) at (3.176,-0.67); (updateopfeedbackin) at (3.316,-0.67); (updateopin) at (3.176,-1.145); (updateopout) at (3.316,-1.145); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (idxtomul) at (3.933,-0.67); (idxtomul) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
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Explicit-Segment Indexed / Predecrement Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (update.east) – (updateop.west); (updateopfeedbackout) at (3.176,-0.67); (updateopfeedbackin) at (3.316,-0.67); (updateopin) at (3.176,-1.145); (updateopout) at (3.316,-1.145); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (updateop.south) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
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Explicit-Segment Indexed / Plain Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (idx.south) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
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Explicit-Segment Base with Autoupdate / Postincrement Encodings
(update.east) – (updateop.west); (updateopfeedbackout) at (3.65,0.77); (updateopfeedbackin) at (3.79,0.77); (updateopin) at (3.65,0.295); (updateopout) at (3.79,0.295); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (base.south) – (add.north); (disp.east) – (add.west); (add.south) – (ptr.north);
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Explicit-Segment Base with Autoupdate / Predecrement Encodings
(update.east) – (updateop.west); (updateopfeedbackout) at (4.55,0.77); (updateopfeedbackin) at (4.69,0.77); (updateopin) at (4.55,0.295); (updateopout) at (4.69,0.295); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (updateop.south) – (add.north); (disp.east) – (add.west); (add.south) – (ptr.north);
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Explicit-Segment Zero-Base Indexed / Postincrement Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (update.east) – (updateop.west); (updateopfeedbackout) at (3.176,-0.67); (updateopfeedbackin) at (3.316,-0.67); (updateopin) at (3.176,-1.145); (updateopout) at (3.316,-1.145); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (idxtomul) at (3.933,-0.67); (idxtomul) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
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Explicit-Segment Zero-Base Indexed / Predecrement Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (update.east) – (updateop.west); (updateopfeedbackout) at (3.176,-0.67); (updateopfeedbackin) at (3.316,-0.67); (updateopin) at (3.176,-1.145); (updateopout) at (3.316,-1.145); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (updateop.south) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
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Explicit-Segment Zero-Base Indexed / Plain Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (idx.south) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
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Stack-Pointer Indexed / Postincrement Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (update.east) – (updateop.west); (updateopfeedbackout) at (3.176,-0.67); (updateopfeedbackin) at (3.316,-0.67); (updateopin) at (3.176,-1.145); (updateopout) at (3.316,-1.145); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (idxtomul) at (3.933,-0.67); (idxtomul) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
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Stack-Pointer Indexed / Predecrement Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (update.east) – (updateop.west); (updateopfeedbackout) at (3.176,-0.67); (updateopfeedbackin) at (3.316,-0.67); (updateopin) at (3.176,-1.145); (updateopout) at (3.316,-1.145); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (updateop.south) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
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Stack-Pointer Indexed / Plain Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (idx.south) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
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Program-Counter Indexed / Postincrement Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (update.east) – (updateop.west); (updateopfeedbackout) at (3.176,-0.67); (updateopfeedbackin) at (3.316,-0.67); (updateopin) at (3.176,-1.145); (updateopout) at (3.316,-1.145); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (idxtomul) at (3.933,-0.67); (idxtomul) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
2.75in
Program-Counter Indexed / Predecrement Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (update.east) – (updateop.west); (updateopfeedbackout) at (3.176,-0.67); (updateopfeedbackin) at (3.316,-0.67); (updateopin) at (3.176,-1.145); (updateopout) at (3.316,-1.145); (updateopfeedbackout) – (updateopin); (updateopout) – (updateopfeedbackin); (updateop.south) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);
2.75in
Program-Counter Indexed / Plain Encodings
(base.south) – (addbase.north); (disp.east) – (addbase.west); (addbase.south) – (addindex.north); (idx.south) – (mul.north); (scale.east) – (mul.west); (mul.east) – (addindex.west); (addindex.south) – (ptr.north);