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VFADD

Operation

Adds corresponding active floating-point vector elements.

Assembler Syntax

VFADD.{H|S|D}(x) Pn(p), Vn(v), Vn(w)

VFADD.{H|S|D}(x) Pn(p), <ea>(e), Vn(v)

VFADD.{H|S|D}(x) Pn(p), Vn(v), <ea>(e)

Privilege

Unprivileged

Required CPUID flags

FP

VECTOR

VECTORFP

VFADD applies selected floating-point addition independently to each active vector lane. The governing predicate selects active lanes; an inactive destination lane retains its previous value.

For H, S, and D elements, each active result is rounded according to the floating-point environment, and a completed operation accrues any generated NV, OF, UF, and NX causes in FFLAGS; DZ is unchanged. If a generated floating-point exception is enabled in any active lane, VFADD raises FLOATING_POINT_EXCEPTION and commits neither destination lanes nor accrued FFLAGS causes from the faulting operation.

2.75in

Encodings

VFADD.{H|S|D}(x) Pn(p), Vn(v), Vn(w)

Format: Instruction format for VFADD.{H|S|D}(x) Pn(p), Vn(v), Vn(w)

Format: Instruction format for VFADD.{H|S|D}(x) Pn(p), Vn(v), Vn(w)

sizeallowed: 0x5..0x7 [reserved_vector_element_type]

2.75in VFADD.{H|S|D}(x) Pn(p), <ea>(e), Vn(v)

Format: Instruction format for VFADD.{H|S|D}(x) Pn(p), <ea>(e), Vn(v)

Format: Instruction format for VFADD.{H|S|D}(x) Pn(p), <ea>(e), Vn(v)

sizeallowed: 0x5..0x7 [reserved_vector_element_type]

2.75in VFADD.{H|S|D}(x) Pn(p), Vn(v), <ea>(e)

Format: Instruction format for VFADD.{H|S|D}(x) Pn(p), Vn(v), <ea>(e)

Format: Instruction format for VFADD.{H|S|D}(x) Pn(p), Vn(v), <ea>(e)

sizeallowed: 0x5..0x7 [reserved_vector_element_type]

dstexcluded: immediate [invalid_destination]