PUZIPLO

Operation

Concatenate even-position predicate lanes from two sources.

Assembler Syntax

PUZIPLO.{B|W|L|Q}(z) Pn(p), Pn(q), Pn(h)

Privilege

Unprivileged

Required CPUID flags

VECTOR

PUZIPLO selects the even-position significant predicate lanes for the chosen B, W, L, or Q width. The selected lanes from the left source form the lower half of the result, and those from the right source form the upper half, with each half retaining source order. The complete destination predicate image is written, and every bit outside its significant positions is cleared. The operation leaves FLAGS unchanged.

In this fixed 16-byte example, even Pa lanes form the low result half and even Pb lanes form the high result half. Larger VLEN applies the same rule over all architectural typed lanes.

PUZIPLO.W even predicate-lane extraction

2.75in

Encodings

PUZIPLO.{B|W|L|Q}(z) Pn(p), Pn(q), Pn(h)

Format: Instruction format for PUZIPLO.{B|W|L|Q}(z) Pn(p), Pn(q), Pn(h)

Format: Instruction format for PUZIPLO.{B|W|L|Q}(z) Pn(p), Pn(q), Pn(h)