PFALSE

Operation

Clear the complete predicate image.

Assembler Syntax

PFALSE Pn(p)

Privilege

Unprivileged

Required CPUID flags

VECTOR

Pd names the destination packed predicate register. Every bit position in its image is written with zero, covering the significant positions for every element size and all intervening positions.

2.75in

Encodings

PFALSE Pn(p)

Format: Instruction format for PFALSE Pn(p)