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VFCOPYSIGN

Operation

Combines each active destination magnitude with the corresponding source sign bit.

Assembler Syntax

VFCOPYSIGN.{H|S|D}(z) Pn(p), Vn(v), Vn(w)

VFCOPYSIGN.{H|S|D}(z) Pn(p), <ea>(e), Vn(v)

VFCOPYSIGN.{H|S|D}(z) Pn(p), Vn(v), <ea>(e)

Privilege

Unprivileged

Required CPUID flags

FP

VECTOR

VECTORFP

For each active H, S, or D element, the result takes its magnitude bits from the old destination element and its sign bit from the corresponding source element.

In the register form, the source and old destination come from corresponding vector lanes. With a memory source, the sign bit comes from the active memory element and the magnitude bits come from the old destination lane. In both forms, an inactive destination lane retains its previous value.

The memory-destination form reads the magnitude bits from each active destination memory element and the sign bit from the corresponding source-register lane, then writes the combined result back to that element. An inactive memory element retains its previous value.

2.75in

Encodings

VFCOPYSIGN.{H|S|D}(z) Pn(p), Vn(v), Vn(w)

Format: Instruction format for VFCOPYSIGN.{H|S|D}(z) Pn(p), Vn(v), Vn(w)

Format: Instruction format for VFCOPYSIGN.{H|S|D}(z) Pn(p), Vn(v), Vn(w)

sizeallowed: 0x1..0x3 [reserved_vector_element_type]

2.75in VFCOPYSIGN.{H|S|D}(z) Pn(p), <ea>(e), Vn(v)

Format: Instruction format for VFCOPYSIGN.{H|S|D}(z) Pn(p), <ea>(e), Vn(v)

Format: Instruction format for VFCOPYSIGN.{H|S|D}(z) Pn(p), <ea>(e), Vn(v)

sizeallowed: 0x1..0x3 [reserved_vector_element_type]

2.75in VFCOPYSIGN.{H|S|D}(z) Pn(p), Vn(v), <ea>(e)

Format: Instruction format for VFCOPYSIGN.{H|S|D}(z) Pn(p), Vn(v), <ea>(e)

Format: Instruction format for VFCOPYSIGN.{H|S|D}(z) Pn(p), Vn(v), <ea>(e)

sizeallowed: 0x1..0x3 [reserved_vector_element_type]

dstexcluded: immediate [invalid_destination]