OR

Operation

Computes the bitwise OR of the source and destination operands.

Assembler Syntax

OR.{L|Q}(z) Rn(s), Rn(d)

OR.{B|W|L|Q}(z) Rn(s), <ea>(e)

OR.{B|W|L|Q}(z) <ea>(e), Rn(d)

OR.{B|W|L|Q}(z) <imm8s>, <ea>(e)

OR.{W|L|Q}(z) <imm16s>, <ea>(e)

OR.{L|Q}(z) <imm32s>, <ea>(e)

OR.Q <imm64>, <ea>(e)

Privilege

Unprivileged

Repeat eligibility

REP eligible; REPcc observes dst

Writes the selected-width bitwise disjunction of the source and destination values to the destination.

2.75in

Encodings

OR.{L|Q}(z) Rn(s), Rn(d)

Format: Instruction format for OR.{L|Q}(z) Rn(s), Rn(d)

2.75in OR.{B|W|L|Q}(z) Rn(s), <ea>(e)

Format: Instruction format for OR.{B|W|L|Q}(z) Rn(s), <ea>(e)

dst — excluded: immediate [invalid_destination]

2.75in OR.{B|W|L|Q}(z) <ea>(e), Rn(d)

Format: Instruction format for OR.{B|W|L|Q}(z) <ea>(e), Rn(d)

2.75in OR.{B|W|L|Q}(z) <imm8s>, <ea>(e)

Format: Instruction format for OR.{B|W|L|Q}(z) <imm8s>, <ea>(e)

dst — excluded: immediate [invalid_destination]

2.75in OR.{W|L|Q}(z) <imm16s>, <ea>(e)

Format: Instruction format for OR.{W|L|Q}(z) <imm16s>, <ea>(e)

size — allowed: 0x1..0x3 [immediate_wider_than_operation_size]

dst — excluded: immediate [invalid_destination]

2.75in OR.{L|Q}(z) <imm32s>, <ea>(e)

Format: Instruction format for OR.{L|Q}(z) <imm32s>, <ea>(e)

dst — excluded: immediate [invalid_destination]

2.75in OR.Q <imm64>, <ea>(e)

Format: Instruction format for OR.Q <imm64>, <ea>(e)

dst — excluded: immediate [invalid_destination]