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VMULHS

Operation

Writes the high half of each active signed destination/source product.

Assembler Syntax

VMULHS.{B|W|L|Q}(z) Pn(p), Vn(v), Vn(w)

VMULHS.{B|W|L|Q}(z) Pn(p), <ea>(e), Vn(v)

VMULHS.{B|W|L|Q}(z) Pn(p), Vn(v), <ea>(e)

Privilege

Unprivileged

Required CPUID flags

VECTOR

The governing predicate selects destination elements for update. The old destination and corresponding source are interpreted as two's-complement signed values at the selected B, W, L, or Q width. Their product is formed at twice that width, and its upper element-width half replaces the destination element. An unselected destination element retains its previous bit pattern.

The register form reads both operands from corresponding vector lanes. The memory-source form reads source elements from memory and updates destination register lanes. The memory-destination form treats each selected memory element as the old destination, multiplies it by the corresponding source-register lane, and writes the upper half back to that memory element.

2.75in

Encodings

VMULHS.{B|W|L|Q}(z) Pn(p), Vn(v), Vn(w)

Format: Instruction format for VMULHS.{B|W|L|Q}(z) Pn(p), Vn(v), Vn(w)

Format: Instruction format for VMULHS.{B|W|L|Q}(z) Pn(p), Vn(v), Vn(w)

2.75in VMULHS.{B|W|L|Q}(z) Pn(p), <ea>(e), Vn(v)

Format: Instruction format for VMULHS.{B|W|L|Q}(z) Pn(p), <ea>(e), Vn(v)

Format: Instruction format for VMULHS.{B|W|L|Q}(z) Pn(p), <ea>(e), Vn(v)

2.75in VMULHS.{B|W|L|Q}(z) Pn(p), Vn(v), <ea>(e)

Format: Instruction format for VMULHS.{B|W|L|Q}(z) Pn(p), Vn(v), <ea>(e)

Format: Instruction format for VMULHS.{B|W|L|Q}(z) Pn(p), Vn(v), <ea>(e)

dstexcluded: immediate [invalid_destination]