TESTJcc

Operation

Tests two Rn registers and branches on the selected condition without writing FLAGS.

Assembler Syntax

TESTJcc.{B|W|L|Q}(z) Rn(s), Rn(d), <imm8s>

TESTJcc.{B|W|L|Q}(z) Rn(s), Rn(d), <imm16s>

Privilege

Unprivileged

TESTJcc computes the same temporary logical-test result as TEST for the selected operand size, evaluates the encoded condition from that temporary result, and branches to the relative target when the condition is true. The computed condition is consumed only by the branch decision; architectural FLAGS are not read or written. Conditions T and F are reserved and are not valid encodings.

2.75in

Encodings

TESTJcc.{B|W|L|Q}(z) Rn(s), Rn(d), <imm8s>

Format: Instruction format for TESTJcc.{B|W|L|Q}(z) Rn(s), Rn(d), <imm8s>

cc — allowed: 0x2..0xf [condition_true_false_reclaimed]

2.75in TESTJcc.{B|W|L|Q}(z) Rn(s), Rn(d), <imm16s>

Format: Instruction format for TESTJcc.{B|W|L|Q}(z) Rn(s), Rn(d), <imm16s>

cc — allowed: 0x2..0xf [condition_true_false_reclaimed]