VMOV
Operation
Copies or merges vector elements between registers and contiguous memory.
Assembler Syntax
VMOV Vn(v), Vn(w)
VMOV.{B|W|L|Q}(z) Pn(p), Vn(v), Vn(w)
VMOV.{B|W|L|Q}(z) Pn(p), <ea>(e), Vn(v)
VMOV.{B|W|L|Q}(z) Pn(p), Vn(v), <ea>(e)
Privilege
Unprivileged
Required CPUID flags
VECTOR
The unsuffixed register form copies the complete source vector image to Vd. The predicated register form replaces each active destination lane with the corresponding Vn lane and retains every inactive destination lane.
For a memory source, the effective address supplies the contiguous anchor and each active lane reads its corresponding element into Vd; inactive lanes issue no access and retain their old values. For a memory destination, each active lane stores its corresponding Vn element and each inactive lane issues no access.
VMOV.L memory load with merge
2.75in
Encodings
VMOV Vn(v), Vn(w)
Format: Instruction format for VMOV Vn(v), Vn(w)
2.75in VMOV.{B|W|L|Q}(z) Pn(p), Vn(v), Vn(w)
Format: Instruction format for VMOV.{B|W|L|Q}(z) Pn(p), Vn(v), Vn(w)
2.75in VMOV.{B|W|L|Q}(z) Pn(p), <ea>(e), Vn(v)
Format: Instruction format for VMOV.{B|W|L|Q}(z) Pn(p), <ea>(e), Vn(v)
2.75in VMOV.{B|W|L|Q}(z) Pn(p), Vn(v), <ea>(e)
Format: Instruction format for VMOV.{B|W|L|Q}(z) Pn(p), Vn(v), <ea>(e)
dst — excluded: immediate [invalid_destination]