DIVMODU

Operation

Divides an unsigned quotient-register dividend by source and writes quotient and remainder registers.

Assembler Syntax

DIVMODU.{B|W|L|Q}(z) <ea>(e), Rn(q), Rn(r)

DIVMODU.{B|W|L|Q}(z) Rn(e), Rn(q), Rn(r)

Privilege

Unprivileged

Repeat eligibility

REP eligible; REPcc observes quotient

The source operand supplies the unsigned divisor, and the quotient register Rn(q) supplies the unsigned dividend before the operation. On success, Rn(q) receives their unsigned quotient and the remainder register Rn(r) receives the unsigned remainder satisfying dividend = quotient * divisor + remainder.

Let \(n\) be the selected operand width, \(d\) the unsigned dividend, and \(s\) the unsigned divisor. The quotient and remainder are defined by $\(q = \lfloor d/s \rfloor, \qquad r = d - qs .\)$ For a nonzero divisor, the remainder satisfies \(0 \le r < s\). The original quotient operand supplies the dividend. On success the quotient operand receives \(q\), and the separate remainder operand receives \(r\).

A zero divisor raises DIVIDE_BY_ZERO; no destination is changed.

2.75in

Encodings

DIVMODU.{B|W|L|Q}(z) <ea>(e), Rn(q), Rn(r)

Format: Instruction format for DIVMODU.{B|W|L|Q}(z) <ea>(e), Rn(q), Rn(r)

quotient, remainder — illegal_instruction

2.75in DIVMODU.{B|W|L|Q}(z) Rn(e), Rn(q), Rn(r)

Format: Instruction format for DIVMODU.{B|W|L|Q}(z) Rn(e), Rn(q), Rn(r)

quotient, remainder — illegal_instruction