VLCADD

Operation

Add a signed immediate multiple of the selected lane count to Rn.

Assembler Syntax

VLCADD.{B|W|L|Q}(z) <imm8s>, Rn(r)

Privilege

Unprivileged

Required CPUID flags

VECTOR

VLCADD reads the old Rn value and adds the signed eight-bit immediate multiplied by the selected vector lane count. The lane count is VLEN in bytes divided by the selected B, W, L, or Q element width in bytes, and the addition is modulo \(2^{64}\). The operation leaves FLAGS unchanged.

2.75in

Encodings

VLCADD.{B|W|L|Q}(z) <imm8s>, Rn(r)

Format: Instruction format for VLCADD.{B|W|L|Q}(z) <imm8s>, Rn(r)