VTOP

Operation

Queries the current translation of a linear address without changing translation state.

Assembler Syntax

VTOP Rn(v), Rn(p)

Privilege

Supervisor only

With paging disabled, VTOP returns the supplied address when it fits PABITS. With paging enabled, it returns the current physical byte-address translation without accessing the translated target. FLAGS.Z reports success; FLAGS.N, FLAGS.C, and FLAGS.V are zero. The query does not modify PTE.A or PTE.D.

The source address is checked for canonicality before the page-table walk. The walk begins at the PTCR root and follows the LA45 or LA56 hierarchy selected by PTCR.TT using the virtual page number.

Every continuing entry must be a valid table pointer. PTE.R, PTE.W, PTE.X, and PTE.U are intersected across table pointers and the terminating leaf PTE.AM. A valid leaf at L1, L2, L3, or L4 combines its naturally aligned physical base with the original low 14, 23, 34, or 45 address bits respectively to form a byte address. Success sets FLAGS.Z and clears FLAGS.N, FLAGS.C, and FLAGS.V. Any canonicality, PABITS, or walk failure returns zero and clears all four flags without raising an access exception, setting PTE.A or PTE.D, or modifying the TLB.

2.75in

Encodings

VTOP Rn(v), Rn(p)

Format: Instruction format for VTOP Rn(v), Rn(p)