PSLIDEUP

Operation

Move predicate lanes toward higher indices and insert zero at the low end.

Assembler Syntax

PSLIDEUP.{B|W|L|Q}(z) imm6(i), Pn(p)

Privilege

Unprivileged

Required CPUID flags

VECTOR

PSLIDEUP moves the significant predicate positions for the selected B, W, L, or Q width toward higher typed-lane indices by the unsigned immediate count. Vacated positions at the low end become zero. A count at least as large as the architectural typed-lane count clears every significant position. The complete destination predicate image is written, and every bit outside its significant positions is cleared. The operation leaves FLAGS unchanged.

Typed predicate lanes move two positions toward higher indices. The two low word-significant result positions become zero, and the rule continues through higher lanes for larger VLEN.

PSLIDEUP.W slide up by two predicate lanes

2.75in

Encodings

PSLIDEUP.{B|W|L|Q}(z) imm6(i), Pn(p)

Format: Instruction format for PSLIDEUP.{B|W|L|Q}(z) imm6(i), Pn(p)

Format: Instruction format for PSLIDEUP.{B|W|L|Q}(z) imm6(i), Pn(p)