VFCEIL

Operation

Rounds each active floating-point element upward to an integral value in the same format.

Assembler Syntax

VFCEIL.{H|S|D}(z) Pn(p), Vn(v)

VFCEIL.{H|S|D}(z) Pn(p), <ea>(e), Vn(v)

VFCEIL.{H|S|D}(z) Pn(p), Vn(v), <ea>(e)

Privilege

Unprivileged

Required CPUID flags

FP

VECTOR

VECTORFP

Each active H, S, or D element is rounded upward to an integral value in the same floating-point format. The register form reads and overwrites each active destination lane. The memory-source form reads each active memory element and writes the result to the corresponding destination lane. An inactive destination lane retains its previous value.

The memory-destination form rounds each active source-register element and writes the result to the corresponding memory element. Inactive memory elements retain their previous values, making the destination transaction a lane-wise read-modify-write.

2.75in

Encodings

VFCEIL.{H|S|D}(z) Pn(p), Vn(v)

Format: Instruction format for VFCEIL.{H|S|D}(z) Pn(p), Vn(v)

size — allowed: 0x1..0x3 [reserved_vector_element_type]

2.75in VFCEIL.{H|S|D}(z) Pn(p), <ea>(e), Vn(v)

Format: Instruction format for VFCEIL.{H|S|D}(z) Pn(p), <ea>(e), Vn(v)

size — allowed: 0x1..0x3 [reserved_vector_element_type]

2.75in VFCEIL.{H|S|D}(z) Pn(p), Vn(v), <ea>(e)

Format: Instruction format for VFCEIL.{H|S|D}(z) Pn(p), Vn(v), <ea>(e)

size — allowed: 0x1..0x3 [reserved_vector_element_type]

dst — excluded: immediate [invalid_destination]