PSLIDEDN

Operation

Move predicate lanes toward lower indices and insert zero at the high end.

Assembler Syntax

PSLIDEDN.{B|W|L|Q}(z) imm6(i), Pn(p)

Privilege

Unprivileged

Required CPUID flags

VECTOR

PSLIDEDN moves the significant predicate positions for the selected B, W, L, or Q width toward lower typed-lane indices by the unsigned immediate count. Vacated positions at the high end become zero. A count at least as large as the architectural typed-lane count clears every significant position. The complete destination predicate image is written, and every bit outside its significant positions is cleared. The operation leaves FLAGS unchanged.

In this fixed 16-byte example, typed predicate lanes move two positions toward lower indices and the two highest result positions become zero. A larger VLEN applies the same rule at its architectural high end.

PSLIDEDN.W slide down by two predicate lanes

2.75in

Encodings

PSLIDEDN.{B|W|L|Q}(z) imm6(i), Pn(p)

Format: Instruction format for PSLIDEDN.{B|W|L|Q}(z) imm6(i), Pn(p)

Format: Instruction format for PSLIDEDN.{B|W|L|Q}(z) imm6(i), Pn(p)