VFCMPcc

Operation

Compares active floating-point lanes and writes a complete predicate image.

Assembler Syntax

VFCMPcc.{H|S|D}(x) Pn(p), Vn(v), Vn(w), Pn(q)

VFCMPcc.{H|S|D}(x) Pn(p), Vn(v), <ea>(e), Pn(q)

Privilege

Unprivileged

Required CPUID flags

FP

VECTOR

VECTORFP

VFCMPcc compares corresponding active floating-point elements under the encoded condition. The register form reads both elements from vector registers. The memory form reads the right-hand element from the corresponding active VEA location.

H, S, and D forms apply the selected floating-point condition under the common floating-point comparison rules.

The destination is a complete predicate image. A significant result bit is set when its governing bit is set and the selected relation is true. Every other predicate bit is clear.

2.75in

Encodings

VFCMPcc.{H|S|D}(x) Pn(p), Vn(v), Vn(w), Pn(q)

Format: Instruction format for VFCMPcc.{H|S|D}(x) Pn(p), Vn(v), Vn(w), Pn(q)

size — allowed: 0x5..0x7 [reserved_vector_element_type]

cc — allowed: 0x2..0x3, 0x8..0x9, 0xc..0xf [reserved_vector_comparison_condition]

2.75in VFCMPcc.{H|S|D}(x) Pn(p), Vn(v), <ea>(e), Pn(q)

Format: Instruction format for VFCMPcc.{H|S|D}(x) Pn(p), Vn(v), <ea>(e), Pn(q)

size — allowed: 0x5..0x7 [reserved_vector_element_type]

cc — allowed: 0x2..0x3, 0x8..0x9, 0xc..0xf [reserved_vector_comparison_condition]