MOVACQ

Operation

Loads from memory with acquire ordering.

Assembler Syntax

MOVACQ.{B|W|L|Q}(z) <ea>(e), Rn(d)

Privilege

Unprivileged

Required CPUID flags

MOVACQ

Loads the selected-width memory value into the destination register. The load has acquire ordering: later memory operations by the same logical processor are ordered after it. A sub-Q destination is zero-extended to 64 bits. The instruction does not impose release or global sequentially consistent ordering.

2.75in

Encodings

MOVACQ.{B|W|L|Q}(z) <ea>(e), Rn(d)

Format: Instruction format for MOVACQ.{B|W|L|Q}(z) <ea>(e), Rn(d)

memory — excluded: immediate [memory_operand_required]