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AND

Operation

Computes the bitwise AND of the source and destination operands.

Assembler Syntax

AND.{L|Q}(z) Rn(s), Rn(d)

AND.{B|W|L|Q}(z) Rn(s), <ea>(e)

AND.{B|W|L|Q}(z) <ea>(e), Rn(d)

AND.{B|W|L|Q}(z) <imm8s>, <ea>(e)

AND.{W|L|Q}(z) <imm16s>, <ea>(e)

AND.{L|Q}(z) <imm32s>, <ea>(e)

AND.Q <imm64>, <ea>(e)

Privilege

Unprivileged

Repeat eligibility

REP eligible; REPcc observes dst

Writes the selected-width bitwise conjunction of the source and destination values to the destination.

2.75in

Encodings

AND.{L|Q}(z) Rn(s), Rn(d)

Format: Instruction format for AND.{L|Q}(z) Rn(s), Rn(d)

Format: Instruction format for AND.{L|Q}(z) Rn(s), Rn(d)

2.75in AND.{B|W|L|Q}(z) Rn(s), <ea>(e)

Format: Instruction format for AND.{B|W|L|Q}(z) Rn(s), <ea>(e)

Format: Instruction format for AND.{B|W|L|Q}(z) Rn(s), <ea>(e)

dstexcluded: immediate [invalid_destination]

2.75in AND.{B|W|L|Q}(z) <ea>(e), Rn(d)

Format: Instruction format for AND.{B|W|L|Q}(z) <ea>(e), Rn(d)

Format: Instruction format for AND.{B|W|L|Q}(z) <ea>(e), Rn(d)

2.75in AND.{B|W|L|Q}(z) <imm8s>, <ea>(e)

Format: Instruction format for AND.{B|W|L|Q}(z) <imm8s>, <ea>(e)

Format: Instruction format for AND.{B|W|L|Q}(z) <imm8s>, <ea>(e)

dstexcluded: immediate [invalid_destination]

2.75in AND.{W|L|Q}(z) <imm16s>, <ea>(e)

Format: Instruction format for AND.{W|L|Q}(z) <imm16s>, <ea>(e)

Format: Instruction format for AND.{W|L|Q}(z) <imm16s>, <ea>(e)

sizeallowed: 0x1..0x3 [immediate_wider_than_operation_size]

dstexcluded: immediate [invalid_destination]

2.75in AND.{L|Q}(z) <imm32s>, <ea>(e)

Format: Instruction format for AND.{L|Q}(z) <imm32s>, <ea>(e)

Format: Instruction format for AND.{L|Q}(z) <imm32s>, <ea>(e)

dstexcluded: immediate [invalid_destination]

2.75in AND.Q <imm64>, <ea>(e)

Format: Instruction format for AND.Q <imm64>, <ea>(e)

Format: Instruction format for AND.Q <imm64>, <ea>(e)

dstexcluded: immediate [invalid_destination]