Repeated Scalar Execution

REP Rn, (<instruction>) and REPcc Rn, (<instruction>) repeat one scalar instruction. The body is decoded and checked for repeat eligibility before a zero-count annul is applied, then remains fixed for that repeat context. A body may not be a repeat operation, a repeat-control instruction, or a control transfer.

Entering repeat state captures the selected Rn value as an unsigned remaining count. A valid zero count performs no body side effects. Otherwise each iteration evaluates operands and commits the body's register, memory, and auto-update effects according to its ordinary scalar rules. A body read of the selected counter register observes the iteration-start architectural value; a body write to that register is ignored.

Each successfully committed iteration decrements the captured count before an event may be admitted at the next iteration boundary. A condition-false REPcc iteration still commits its body and decrements the count before repeat state is cleared. If the body faults, that iteration commits nothing and does not decrement the count; earlier iterations remain committed. Event entry then saves the repeat-prefix address in SAVED_PC and clears hidden repeat state, so ERET returns to the prefix and re-executes it normally with the unchanged counter.

The REPcc observation attribute identifies the value tested after the body executes. A result:operand or source:operand observation names an operand; computed names the derived value defined by that instruction. The temporary condition image sets Z exactly when the observed value is zero, sets N from its most significant bit at the observation width, and clears C and V. It does not sample or overwrite architectural FLAGS, although the body's own FLAGS effects commit normally. REP is the unconditional T spelling; condition F is reserved.

While repeat state is active, architectural PC identifies the body instruction. After a successful body commit, the counter decrement completes before an event may be admitted between iterations. Both that event path and the fault path above save the repeat-prefix address in SAVED_PC and clear hidden repeat state. ERET restores the ordinary saved architectural state and begins execution at that prefix address; it does not restore hidden repeat continuation state. The prefix is therefore decoded and executed normally, using the already-decremented architectural Rn value. STATUS.TF and STATUS.RF apply once to each committed body iteration; a zero-count annul is also one trace unit.