Address Wait Instructions

Summary

Address Wait Instructions Summary (Informative)

Mnemonic	Brief description
	Waits while a memory value equals the expected register value.
	Wakes all waiters armed on the addressed location.

Address Wait Protocol

WAIT and WAKE form an address-scoped blocking protocol. A waiter supplies an expected value and a memory address. The comparison read and monitor arm are indivisible: the logical processor blocks only when the selected memory value still equals the expected value at the instant the monitor becomes visible to WAKE.

WAKE broadcasts to every armed waiter whose resolved physical start address is the same as its operand address. It does not modify memory. An ordinary store is not required to wake a waiter; synchronization code first changes the condition with a release operation and then executes WAKE. A waiter always rechecks its condition because WAIT may return spuriously. These rules prevent a wake from being lost between the comparison and monitor arm without turning WAKE itself into a memory-ordering operation.

Blocking in WAIT does not stop the base architectural timebase. A deadline-timer interrupt may become pending while the monitor remains armed; ordinary interrupt admission determines when it is delivered.