DIVMODS

Operation

Divides a signed quotient-register dividend by source and writes quotient and remainder registers.

Assembler Syntax

DIVMODS.{B|W|L|Q}(z) <ea>(e), Rn(q), Rn(r)

DIVMODS.{B|W|L|Q}(z) Rn(e), Rn(q), Rn(r)

Privilege

Unprivileged

Repeat eligibility

REP eligible; REPcc observes quotient

The source operand supplies the signed divisor, and the quotient register Rn(q) supplies the signed dividend before the operation. On success, Rn(q) receives their quotient truncated toward zero and the remainder register Rn(r) receives the signed remainder satisfying dividend = quotient * divisor + remainder. Sub-Q quotient and remainder results are each sign-extended to 64 bits.

Let \(n\) be the selected operand width, \(d\) the signed two's-complement dividend, and \(s\) the signed two's-complement divisor. The quotient and remainder are defined by $\(q = \operatorname{trunc}(d/s), \qquad r = d - qs .\)$ Thus a nonzero remainder has the sign of the dividend. The original quotient operand supplies the dividend. On success the quotient operand receives \(q\), and the separate remainder operand receives \(r\).

A zero divisor raises DIVIDE_BY_ZERO; the most-negative value divided by \(-1\) raises SIGNED_DIVIDE_OVERFLOW. No destination is changed.

2.75in

Encodings

DIVMODS.{B|W|L|Q}(z) <ea>(e), Rn(q), Rn(r)

Format: Instruction format for DIVMODS.{B|W|L|Q}(z) <ea>(e), Rn(q), Rn(r)

quotient, remainder — illegal_instruction

2.75in DIVMODS.{B|W|L|Q}(z) Rn(e), Rn(q), Rn(r)

Format: Instruction format for DIVMODS.{B|W|L|Q}(z) Rn(e), Rn(q), Rn(r)

quotient, remainder — illegal_instruction